- IEEE 754 single precision floating-point instructions

- is independent of the main CPU and executes code

• on-chip memory

- provides 256KB (128KW) flash memory (}) on two independent storage banks ECC Protection)

- 100KB (50KW) RAM（ ECC protection or parity protection)

- Supports third-party development for dual zone security

- Unique identifier (UID) Number

• Clock and system control

- Two internal zero pins 10MHz oscillators

- on-chip crystal oscillator and external clock input

- windowed watchdog Timer module

- Clock loss detection circuit

• 1.1 V kernel 3.3V I/O Design

- can generate 1.1 V Internal voltage of VREG or DC-DC allows for single power supply design

- undervoltage reset (BOR) circuit

• system peripherals

- 6 channels direct memory access (DMA) controllers

- 40 independent programmable multiplexed general-purpose inputs / outputs (GPIO) pins

- provides 21 digital inputs

on the analog pins - Enhanced Peripheral Interrupt Extension (ePIE) Module

- supports multiple low-power modes with external wake-up function (LPM)

- Embedded real-time analysis and diagnosis (ERAD)

• Communication peripherals

- A power management bus (PMBus) interface

- One Integrated Circuit Bus (I2C) Interface
(Pin Bootable)

- Two Controller Area Network (CAN) Bus Ports (Pin Bootable)

- Two serial peripheral interfaces (SPI) ports (pin bootable)

- Two serial communication interfaces compatible with UART (SCI)
(pin bootable)

- A local interconnect network compatible with UART (LIN)

- A fast serial interface with transmitter and receiver (FSI)

• simulation system

- Three 3.45MSPS 12 bit analog-to-digital converters (ADC)

• up to 21 external channels

Each ADC has four integrated post-processing Blocks (PPB)

- Seven window comparators with 12 bit reference digital to analog converters (DAC) (CMPSS)

• digital interference filters

- Two 12 bit buffers DAC outputs

- Seven programmable gain amplifiers (PGA)

• Programmable gain settings: 3 、 6 、 12 、 24

• Programmable output filtering

• Enhanced control peripheral

- 16 with high-resolution functionality () 150ps resolution) of ePWM channels

• have high-resolution integrated dead zone support

• integrated hardware jump box area (TZ)

- Seven enhanced capture (eCAP) modules

• provide high-resolution capture (HRCAP)

on two modules - Two enhanced orthogonal encoder pulses that support CW/CCW operation modes (eQEP) modules

- Four ∑ - Δ Filter Module (SDFM) Input channels (two parallel filters per channel)

• Standard SDFM Data filtering

• comparator filters for fast operation in cases of overestimation or underestimation

• Configurable logic blocks 10} (CLB)