● Single source power supply
-4.5~40V
- Integrated LDO
- Integrated POR and BOR circuits (pre drive 12V, core 1.2V, IO 5V, analog 3.0V)
● High performance 32-bit fixed-point DSP core
- Main frequency up to 100MHz
-16 × 16, 32 × 32 MAC operation
-16 × 16 dual MAC operation
- Harvard bus structure
- Fast interrupt response and processing
● Programmable control law Acceleration Unit (CLA)
-32-bit Floating Point Accelerator
- Acceleration code runs parallel to CPU code
● on-chip memory resources
-18K x 16 bit SARAM
-64K x 16 bit Flash
-8K x 16 bit BootROM

● 128 bit secure key

● ADC

-12 bit SAR, conversion rate 4MSPS
-13 channels, with temperature sensor channel
- input range 0~3V, internal reference
● Operational amplifier
-1 OP, can be used for bus current detection amplification
-3 PGAs, can be used for phase current detection amplification
● Integrated three-phase high and low side half bridge drive circuit
- six channel NMOSP Re Driver
- The maximum floating absolute voltage on the high side of the gate drive circuit reaches 45V
- The driving capability IO+/IO -:+1.8A-1.5A
● Voltage comparator
- Three external or built-in 8-bit DAC voltage references are used to output the associated TZ, Support periodic waveform protection
● Enhanced control peripherals
-3 32-bit timing/counters
-5 16 bit timing/counters
-2 PWM outputs
-1 capture unit (HRCAP1)

● interrupts
- up to 53 interrupts set by PIE
● Serial communication peripherals
- CAN, SPI
-1 channel CANFD
-1 LIN control+transceiver
● IO
-13 universal IO
● Clock
-10M on-chip oscillator
- Quartz crystal oscillator/external input mode
- PLL multiplication factor 1x~12x
● Supports WDT
● Supports JTAG Online simulation
- Analysis and breakpoint function
- Hardware based real-time debugging
● QFN56 packaging
● Temperature range -40 ℃~+125 ℃
● AEC-Q100 certification