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Product Overview
AVP32F08
AVP32F08 is a 32-bit fixed-point and floating-point digital signal processor that supports a clock frequency of 150 MHz and has powerful computing capabilities. It integrates multiple types of memory, enhanced peripherals, communication interface peripherals, and analog peripherals internally, supports QFP100 packaging, and has passed AEC-Q100 automotive certification. It can be widely applied in fields such as industrial motor drive, photovoltaic inverters and digital power supplies, electric vehicles and transportation, motor control, as well as sensing and signal processing.
Datasheet →industry Automotive Standard
Product Features
● High performance static CMOS technology
- up to 150MHz (6.67ns cycle time)
-1.8V to 1.5V core, 3.3V I/O design
● High performance 32-bit CPU
- IEEE-754 single precision floating-point unit (FPU)
-16 x 16 bit and 32 x 32-bit multiply accumulate (MAC) operations tag13 -16 x 16 dual MACs
- Harvard bus architecture
- Fast interrupt response and processing
- Unified memory programming model
- Efficient code (using C/C++and assembly language)
● 6-channel DMA processor (for ADC, McBSP, ePWM, and others) SARAM)
● on-chip memory
-256K × 16 bit flash memory, 34K × 16 bit SARAM
-1K x 16 bit one-time programmable (OTP) ROM
● boot ROM (8K × 16 bit)
- supports software boot mode (via SCI, SPI, CAN, IIC, McBSP, and parallel I/O)
- Standard Mathematical Table
● Clock and System Control
- Supports Dynamic Phase Locked Loop (PLL) Ratio Variation
- Integrated Power On and Under Voltage Reset Source
- On Chip Oscillators
- Watchdog Timer Module
● GPO0 to GPO34 The pin can be connected to one of the eight external kernel interrupts
● , which supports all 56 peripheral interrupts. The Peripheral Interrupt Extension (PIE) block
● 128 Bit security key/lock
- protects flash/OTP/RAM module
- prevents firmware reverse engineering
● low-power and power-saving modes
- supports IDLE (idle), STANDBY (standby), HALT (pause) modes
● Byte order: Small end order
● ESD Grade (HBM): 2000V
● MSL Humidity sensitivity level: 3
● Enhanced control peripheral
- up to 16 pulse width modulation (PWM) outputs
- up to 6 high-resolution pulse width modulators (HRPWMs) supporting 150ps micro edge defined bit (MEP) resolution
- up to 6 event capture inputs 11}
- Up to 2 orthogonal encoder interfaces
-8 32-bit timers (6 eCAP, 2 eQEP)
-9 32-bit timers (6 ePWM, 3 XINTCTR)
● -3 32-bit CPU timers
Tag10} ● Serial port peripherals
-2 Controller Area Network (CAN) modules
-2 SCI (UART) modules
-2 McBSP modules (configurable as SPI)
-1 SPI module
-1 Internal Integrated Circuit (IIC) bus
● 12 Bit to digital converter (ADC), 16 channels
-12 bits -160ns (Max) conversion rate
-2 x 8-channel input multiplexer
- two sample and hold
- sequential/synchronous conversion
- internal or external reference
● Up to 35 individually programmable multiplexed general-purpose input/output (GPIO) pins with input filtering capabilities
● JTAG Boundary scan support
● Advanced simulation features
- Analysis and breakpoint functionality
- Real time hardware debugging
● Development support includes tag11
- ANSI C/C++compiler/assembly language/connector
- compiler
- digital motor control and digital power software library
● product model
- AVP32F08QP100Q (via AEC-Q100) Authentication)
- AVP32F08QP100S
- AVP32F08QP100S1 (filtering)
- up to 150MHz (6.67ns cycle time)
-1.8V to 1.5V core, 3.3V I/O design
● High performance 32-bit CPU
- IEEE-754 single precision floating-point unit (FPU)
-16 x 16 bit and 32 x 32-bit multiply accumulate (MAC) operations tag13 -16 x 16 dual MACs
- Harvard bus architecture
- Fast interrupt response and processing
- Unified memory programming model
- Efficient code (using C/C++and assembly language)
● 6-channel DMA processor (for ADC, McBSP, ePWM, and others) SARAM)
● on-chip memory
-256K × 16 bit flash memory, 34K × 16 bit SARAM
-1K x 16 bit one-time programmable (OTP) ROM
● boot ROM (8K × 16 bit)
- supports software boot mode (via SCI, SPI, CAN, IIC, McBSP, and parallel I/O)
- Standard Mathematical Table
● Clock and System Control
- Supports Dynamic Phase Locked Loop (PLL) Ratio Variation
- Integrated Power On and Under Voltage Reset Source
- On Chip Oscillators
- Watchdog Timer Module
● GPO0 to GPO34 The pin can be connected to one of the eight external kernel interrupts
● , which supports all 56 peripheral interrupts. The Peripheral Interrupt Extension (PIE) block
● 128 Bit security key/lock
- protects flash/OTP/RAM module
- prevents firmware reverse engineering
● low-power and power-saving modes
- supports IDLE (idle), STANDBY (standby), HALT (pause) modes
● Byte order: Small end order
● ESD Grade (HBM): 2000V
● MSL Humidity sensitivity level: 3
● Enhanced control peripheral
- up to 16 pulse width modulation (PWM) outputs
- up to 6 high-resolution pulse width modulators (HRPWMs) supporting 150ps micro edge defined bit (MEP) resolution
- up to 6 event capture inputs 11}
- Up to 2 orthogonal encoder interfaces
-8 32-bit timers (6 eCAP, 2 eQEP)
-9 32-bit timers (6 ePWM, 3 XINTCTR)
● -3 32-bit CPU timers
Tag10} ● Serial port peripherals
-2 Controller Area Network (CAN) modules
-2 SCI (UART) modules
-2 McBSP modules (configurable as SPI)
-1 SPI module
-1 Internal Integrated Circuit (IIC) bus
● 12 Bit to digital converter (ADC), 16 channels
-12 bits -160ns (Max) conversion rate
-2 x 8-channel input multiplexer
- two sample and hold
- sequential/synchronous conversion
- internal or external reference
● Up to 35 individually programmable multiplexed general-purpose input/output (GPIO) pins with input filtering capabilities
● JTAG Boundary scan support
● Advanced simulation features
- Analysis and breakpoint functionality
- Real time hardware debugging
● Development support includes tag11
- ANSI C/C++compiler/assembly language/connector
- compiler
- digital motor control and digital power software library
● product model
- AVP32F08QP100Q (via AEC-Q100) Authentication)
- AVP32F08QP100S
- AVP32F08QP100S1 (filtering)
