● Single source power supply

- 5.5~40V

- Integrated LDO (core 1.2V, IO 5V, analog 3.0V)

- Integrated POR and BOR circuits

- Integrated charge pump circuit

● High performance 32-bit fixed-point DSP core

- Maximum frequency of 100MHz

-16 × 16, 32 × 32 MAC operation

-16 × 16 dual MAC operations

- Harvard Bus structure

- Fast interrupt response and processing

● Programmable control law acceleration unit (CLA)

-32-bit floating point acceleration operator

- Acceleration code is executed in parallel with CPU code 14}

● on-chip memory resources

-18K x 16 bit SARAM

-64K x 16 bit Flash

-8K x 16 bit BootROM

● 128 Bit security key

● ADC

-12 bit SAR, conversion rate 4MSPS

-11 channels, with temperature sensor channels

- input range 0~3V, internal reference

● operational amplifier

-1 OP, can be used for bus current detection amplification

-2 PGA, can be used for phase current detection amplification

● integrated three-phase high and low side half bridge drive circuit

- six channels NMOSPre Driver

- High side VCP power supply, no additional bootstrap circuit required

- Low side VGL power supply, stable driving voltage

- with GDF, VDS, OTP fault protection

● voltage comparator

-3 voltage comparators

external or built-in 8bitDAC Voltage reference,

output correlation TZ Support periodic waveform protection

● enhanced control peripherals

-3 32-bit timing/counters

-5 16 bit timing/counters

-2 PWM outputs

-1 capture unit (HRCAP1)

● interrupts

- up to 53 interrupts set by PIE

● Serial communication peripherals

- CAN, SPI

-1-channel CANFD

-1 LIN control+transceiver, supporting sleep and remote wake-up

● IO

-14 universal IOs

● Clock

-10M on-chip oscillator

- Quartz crystal oscillator/external input mode

- PLL multiplier coefficient 1x~12x

● Supports WDT

● Supports JTAG online simulation

- Analysis and breakpoint function

- Hardware based real-time debugging

● QFN56 Encapsulation

● Temperature range -40 ℃~+125 ℃

● AEC-Q100 Authentication