● Single source power supply

- 5.5~40V

- Integrated LDO (Core 1.2V, IO 5V, Analog 3.0V)

- Integrated POR and BOR circuits

- Integrated charge pump circuit

● High performance 32-bit fixed-point DSP core

- Main frequency up to 100MHz

- 16 × 16, 32 × 32 MAC operations

- 16 × 16 dual MAC operation

- Harvard Bus Structure

- Fast interrupt response and processing

● Programmable Control Law Acceleration Unit (CLA)

-32 Bit Floating Point Accelerator

- Accelerate the parallel execution of code and CPU code

● on-chip memory resources

- 18K x 16 bit SARAM

- 64K x 16 bit Flash

- 8K x 16 bit BootROM

● 128 Bit key

● ADC

- 12 bit SAR, conversion rate 4MSPS

- 11 channels, with temperature sensor channel

- Input range 0~3V, internal reference

● operational amplifier

- 1 OP, can be used for bus current detection amplification

- 2 PGA, can be used for phase current detection amplification

● integrated three-phase high and low side half bridge drive circuit

- Six channel NMOSPre Driver

- High side VCP power supply, no additional bootstrap circuit required

- Low side VGL power supply, stable driving voltage

- With GDF, VDS, OTP fault protection

● Voltage comparator

- 3 voltage comparators

- External or built-in 8-bit DAC voltage reference,

- Output associated TZ, supporting periodic waveform protection

● enhanced control peripherals

- 3 32-bit timer/counters

- 5 16 bit timer/counters

- 2-channel PWM output

- 1 capture unit (HRCAP)

● Interrupt

- Up to 42 interrupts set by PIE

● serial communication peripherals

- 1-channel SPI

- 1-channel CAN (with CANFD)

- 1 LIN control+transceiver, supporting sleep and remote wake-up

● IO

-14 Universal IO

● Clock

-10M On-chip oscillator

- Quartz crystal oscillator/external input mode

- PLL multiplier coefficient 1x~12x

● supports WDT

● supports JTAG online simulation

- Analysis and breakpoint function

- Hardware based real-time debugging

● QFN56 5 *5 packages

● Temperature range -40 ℃~+125℃

● AEC-Q100 Authentication