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Product Overview
AVP32F0039
AVP32F0039 is a high-performance floating-point processor with an efficient Harvard bus architecture and a clock speed of up to 120MHz; Provide instruction extensions such as trigonometric acceleration and cyclic redundancy check; Enhanced the speed of key algorithms in real-time control systems. Added ECC protection for Flash and RAM in terms of security, supporting memory power on self-test and hardware built-in self-test for safety diagnostic features. Enhance real-time firmware update hardware, allowing for quick context switching from old firmware to new firmware to minimize application downtime when updating device firmware. Rich control peripherals and communication interfaces make the device widely applicable to applications such as automotive electronic drives and power supplies.
Datasheet →industry Automotive Standard
Product Features
● A2000 32-bit DSP Core (at 120 MHz)
- IEEE 754 Floating Point Unit (FPU)
▷ Supports Fast Integer Division (FINTDIV)
- Triangular Mathematical Unit (TMU)
▷ Supports Nonlinear Proportional Integral Derivative (NLPID) Control
- CRC Engine and Instructions (VCRC)
- Ten hardware breakpoints (including ERAD)
● Programmable Control Law Accelerator (CLA)
-120MHz
- IEEE 754 Single Precision Floating Point Instruction
- Independently executes code
} ● on-chip memory
- Provide 384KB (192KW) of flash memory (ECC protected)
-69KB (34.5KW) of RAM (ECC protected)
- dual zone secure
- secure boot and JTAG lock
● clock and system control
- two internal 10MHz oscillators
- crystal oscillator or external clock input
Tag10- Window based watchdog timer module
- Lost clock detection circuit
- Dual clock comparator (DCC)
● 3.3V I/O design
- Internal VREG generation allows for single power supply design
- Under voltage reset (BOR) circuit
● System peripherals
-6-channel direct memory access (DMA) controller
-55 independent programmable multiplexed general-purpose input/output (GPIO) pins
- provides 23 digital inputs
on analog pins - provides 2 digital inputs/outputs (AGPIO)
on analog pins - enhanced peripheral interrupt extension (ePIE)
- Supports multiple low-power modes (LPM)
- Embedded Real time Analysis and Diagnosis (ERAD)
- Unique Identification (UID) number
● Communication peripherals
-1 Power Management Bus (PMBus) Interface
-2 internal integrated circuit (I2C) ports
-1 controller area network (CAN/DCAN) bus port
-1 controller area network (CAN FD/MCAN) bus port
-2 serial peripheral interface (SPI) ports
-2 UART compatible serial communication interfaces (SCI)
-2 UART compatible local interconnect network (LIN) interfaces tag11
- Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
● Analog System
- Three 4MSPS 12 bit Analog to Digital Converter (ADC)
▷ Up to 23 external channels (including two gpdac outputs)
▷ Each ADC has four integrated post-processing blocks (PPBs)
- four window comparators (CMPSS) with 12 bit reference digital to analog converters (DAC)
▷ Digital interference filters
- two 12 bit buffered DAC outputs
● Enhanced control Peripherals
-16 ePWM channels, including 8 channels with high-resolution functionality (150ps resolution)
▷ Integrated dead zone support
▷ Integrated hardware bounce box area (TZ)
- Three enhanced capture (eCAP) modules
▷ in three eCAPs In the module, there is a high-resolution capture (HRCAP) module
- two enhanced orthogonal encoder pulses (eQEP) modules that support CW/CCW operation modes
- eight Sigma Delta filter modules (SDFM) input channels (two parallel filters per channel)
▷ standard SDFM data filtering
▷ comparator filters
for fast operation in cases of overestimation or underestimation - embedded graphics generator (EPG)
● Configurable Logic Block (CLB)
-4 logical blocks
- Enhance existing peripheral functionality
- Support location manager solutions
● Host Interface Controller (HIC)
- internal memory can be accessed from external hosts
● Backend CRC (BGCRC)
- one cycle CRC operation for 32-bit data
● Advanced Encryption Standard (AES) accelerator
● Real time firmware update (LFU)
} - Fast context switching from old firmware to new firmware
- Reduced flash memory erase time
● Diagnostic features
- Memory Power On Self Test (MPOST)
- Hardware Built in Self Test (HWBIST)
● Targeting compliance with functional safety standards
- Developed specifically for functional safety applications
- System functionality complies with ASIL D and SIL 3 levels
- Hardware functionality complies with ASIL B and SIL 2 levels
● Safety related certifications
- Planned ISO 26262 certification for ASIL B and SIL 2 levels
● Packaging options: tag11
- LQFP100
- LQFP80
- LQFP64
- LQFP48
● Temperature options:
- Environmental temperature (TA): -40 ° C to 125 ° C
- Junction temperature (TJ): -40 ° C C to 150 ° C
- IEEE 754 Floating Point Unit (FPU)
▷ Supports Fast Integer Division (FINTDIV)
- Triangular Mathematical Unit (TMU)
▷ Supports Nonlinear Proportional Integral Derivative (NLPID) Control
- CRC Engine and Instructions (VCRC)
- Ten hardware breakpoints (including ERAD)
● Programmable Control Law Accelerator (CLA)
-120MHz
- IEEE 754 Single Precision Floating Point Instruction
- Independently executes code
} ● on-chip memory
- Provide 384KB (192KW) of flash memory (ECC protected)
-69KB (34.5KW) of RAM (ECC protected)
- dual zone secure
- secure boot and JTAG lock
● clock and system control
- two internal 10MHz oscillators
- crystal oscillator or external clock input
Tag10- Window based watchdog timer module
- Lost clock detection circuit
- Dual clock comparator (DCC)
● 3.3V I/O design
- Internal VREG generation allows for single power supply design
- Under voltage reset (BOR) circuit
● System peripherals
-6-channel direct memory access (DMA) controller
-55 independent programmable multiplexed general-purpose input/output (GPIO) pins
- provides 23 digital inputs
on analog pins - provides 2 digital inputs/outputs (AGPIO)
on analog pins - enhanced peripheral interrupt extension (ePIE)
- Supports multiple low-power modes (LPM)
- Embedded Real time Analysis and Diagnosis (ERAD)
- Unique Identification (UID) number
● Communication peripherals
-1 Power Management Bus (PMBus) Interface
-2 internal integrated circuit (I2C) ports
-1 controller area network (CAN/DCAN) bus port
-1 controller area network (CAN FD/MCAN) bus port
-2 serial peripheral interface (SPI) ports
-2 UART compatible serial communication interfaces (SCI)
-2 UART compatible local interconnect network (LIN) interfaces tag11
- Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
● Analog System
- Three 4MSPS 12 bit Analog to Digital Converter (ADC)
▷ Up to 23 external channels (including two gpdac outputs)
▷ Each ADC has four integrated post-processing blocks (PPBs)
- four window comparators (CMPSS) with 12 bit reference digital to analog converters (DAC)
▷ Digital interference filters
- two 12 bit buffered DAC outputs
● Enhanced control Peripherals
-16 ePWM channels, including 8 channels with high-resolution functionality (150ps resolution)
▷ Integrated dead zone support
▷ Integrated hardware bounce box area (TZ)
- Three enhanced capture (eCAP) modules
▷ in three eCAPs In the module, there is a high-resolution capture (HRCAP) module
- two enhanced orthogonal encoder pulses (eQEP) modules that support CW/CCW operation modes
- eight Sigma Delta filter modules (SDFM) input channels (two parallel filters per channel)
▷ standard SDFM data filtering
▷ comparator filters
for fast operation in cases of overestimation or underestimation - embedded graphics generator (EPG)
● Configurable Logic Block (CLB)
-4 logical blocks
- Enhance existing peripheral functionality
- Support location manager solutions
● Host Interface Controller (HIC)
- internal memory can be accessed from external hosts
● Backend CRC (BGCRC)
- one cycle CRC operation for 32-bit data
● Advanced Encryption Standard (AES) accelerator
● Real time firmware update (LFU)
} - Fast context switching from old firmware to new firmware
- Reduced flash memory erase time
● Diagnostic features
- Memory Power On Self Test (MPOST)
- Hardware Built in Self Test (HWBIST)
● Targeting compliance with functional safety standards
- Developed specifically for functional safety applications
- System functionality complies with ASIL D and SIL 3 levels
- Hardware functionality complies with ASIL B and SIL 2 levels
● Safety related certifications
- Planned ISO 26262 certification for ASIL B and SIL 2 levels
● Packaging options: tag11
- LQFP100
- LQFP80
- LQFP64
- LQFP48
● Temperature options:
- Environmental temperature (TA): -40 ° C to 125 ° C
- Junction temperature (TJ): -40 ° C C to 150 ° C
