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ADM16F03A2 is an improved 16-bit DSP for brushless motor control, integrating LDO and 6NMOS pre-drive modules, equipped with 150MHz main frequency 16-bit DSP processing core + acceleration computing unit, event manager, SPI and SCI modules, 12-bit ADC, and integrated op amplifier, voltage comparator and LIN transceiver; It can form a control core and support multi-mode brushless motor control such as inductive, non-inductive, square wave, and sine wave. The following table is an introduction to resources for ADM16F03A2 motor control.

Table 1 ADM16F03A2 Motor control related resources

At the same time, the ADM16F03A2 supports JTAG online simulation, and supports the fast programming mode of at least four wires in the serial SCI mode. The following is a layout diagram of ADM16F03A2 chip pin definitions:

Figure 2 Chip pin definition layout

ADM16F03A2 is a highly integrated, high-performance BLDC/PMSM controller packaged in QFN56 that allows users to achieve the best price/performance when designing motor control systems, ADM16F03A2 integrates six NMOS Pre-Drivers, op-amps, PGAs, comparators, high-speed ADCs, SCIs, SPIs, and LIN modules. At the same time, it adopts a high-performance 16-bit CPU with embedded 32Kx16-bit Flash and a maximum operating frequency of 150MHz, which can meet the application requirements of high-performance brushless motor control and simplify the system hardware cost. It is suitable for BLDC/PMSM motor square wave, SVPWM/SPWM, FOC drive control.

The circuit modules mainly include: input anti-reverse and filtering circuit part, 24V to 12V system power supply circuit (24V solution), ADM16F03A2 minimum system, power bridge circuit, ADC bus voltage sampling circuit, single-resistor sampling op-amp sampling circuit, bootstrap circuit and PWM/LIN communication feedback circuit.

• Input anti-reverse and filter circuit sections

The input passes through the N tube to achieve anti-reverse function, plus a π-type filter circuit to reduce noise or interference signals.

Figure 3 Anti-reverse bus circuit

            • 24V to 12V system power supply circuit (24V solution)

The DC-DC circuit converts 24V to the 12V required by the backstage system.

            • ADM16F03A2 minimal system

The ADM16F03A2 minimum system is shown in the figure below, including JTAG interface, serial port, PWM module, ADC module, etc.

The op amp OP1 that comes with the system can be configured as a differential mode for bus current sampling through the peripheral resistor, and the output result of the op amp OP1OUT can be connected to COMP0 for hardware overcurrent protection, and different comparison levels can be set inside COMP0, and once the threshold is triggered, the PWM signal can be directly blocked.

When an offline programming program is required, the pad is tested with 5V, TX, RX, IOPE4, and GND signals, and fast offline programming can be achieved with the help of the offline programming tool of the core.

Figure 4 Schematic diagram of chip and interface

            • Power bridge circuitry

The power bridge circuit adopts the configuration of NMOS for both upper and lower tubes, and a total of 6 NMOS form a three-phase half-bridge drive circuit.

The single sampling resistor is 0.001R/0.002R, and the op-amp input is input to the chip port sampling for calculation through the independent op-amp circuit of the OP1 of ADM16 with differential routing.

Fig.5 Schematic diagram of the power bridge circuit

            • ADC bus voltage sampling circuit

The bus voltage sampling circuit is sent to the AD port of the chip through the resistor voltage division to participate in the calculation.

Figure 6 Schematic diagram of AD bus voltage sampling

            • Single-resistor sampling op-amp sampling circuit

The internal independent op amp OP1 group is used for differential op amp 15 times, and it is sent to port A0 for overcurrent protection.

Figure 7 Op amp partial circuit

            • Bootstrap circuit

The 12V voltage of the VDRV is output from the inside of the chip and given to the bootstrap circuit part, so that the drive voltage of the upper bridge can be raised, so that the upper bridge can be controlled.

Fig.8 Bootstrap circuit part

            • PWM/LIN communication feedback circuit

The PWM/LIN signal is externally input, and the PWM/LIN communication feedback is realized through the LIN module integrated inside the chip.

Figure 9 PWM/LIN communication circuit

It adopts a single-resistor sine wave, the circuit is simple and the cost is low. Non-inductive FOC, power closed-loop, speed closed-loop. All kinds of protection (over-under-voltage, over-current, blockage, phase loss, power) and other characteristics.

Motor speed: 2500 rpm

Voltage: DC12V/24V

Power: 400W/600W

A variety of protection measures: over-current protection, short-circuit protection, over-voltage protection, under-voltage protection, blocking protection, phase loss protection, power protection, starting protection, etc.

This solution uses the non-inductive single-resistor FOC algorithm, bus voltage ADC detection, and controls different rotational speeds and fault feedback functions through PWM/LIN. It has the characteristics of tailwind start, low noise, and stable waveform control.